J'ai postulé via un établissement d'enseignement supérieur ou universitaire. J'ai passé un entretien chez Intel Corporation
Entretien
Easy phone interview all about basic of digital circuit, high-speed design which refer to delay and timing, low power design which refer to power consumption. After 1 month got the on site interview, 7 round, all about basic logic, STA and things/projects on resume, people are nice, interview under a friendly circumstance.
Questions d'entretien [1]
Question 1
how does adding a buffer in the middle of a long wire reduce the delay?
CMOS basics: PMOS and NMOS of Inverter operation region under while input varies.
how to form a NOT gate using NAND gate.
J'ai passé un entretien chez Intel Corporation (Santa Clara, CA)
Entretien
Questions on physical design concepts , syn and apr
Sta questions about constraints
Concepts of transistor physics
Phone screen, multiple round, followed by conversation with the hiring manager
Overall good experience
J'ai passé un entretien chez Intel Corporation (Chandler, AZ)
Entretien
Five engineers, a manager and director asked medium level engineering and architecture questions including proof of structured coding and design skills. Each interviewer had varying questions. They rated at 0 (won’t work with candidate), 1 (adequate) or 2 (exceptional hire) for a team survey of votes to compare multiple candidates.
Questions d'entretien [1]
Question 1
Design a state machine to control a four way intersection of varying time traffic lights.
long but effective. 4 rounds of interviews ( quiz questions, computer architecture, past projects, leadership experience, basic algorithm questions, coding, etc.) each last 40 min. results came back after 10 days
