J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 1 semaine. J'ai passé un entretien chez Intel Corporation en déc. 2013
Entretien
Given significant time on resume. Prepared for apti also but focus was on digital and analog circuits. As my thesis was devices based hence also prepared semiconductor devices.
Selection Procedure: Not very sure about short listing. Shortlisted people were there from all spectrum of pointers. No written test. There were two rounds of interview, in first Tech (more focus) + HR and in second more focus was on HR.
Questions d'entretien [1]
Question 1
Other: How to reduce power and delay for given circuit? What are present problems industries facing? How to reduce leakage? How to reduce switching activity? Questions from memory, CMOS, Charge sharing etc
J'ai passé un entretien chez Intel Corporation (Santa Clara, CA)
Entretien
Questions on physical design concepts , syn and apr
Sta questions about constraints
Concepts of transistor physics
Phone screen, multiple round, followed by conversation with the hiring manager
Overall good experience
J'ai passé un entretien chez Intel Corporation (Chandler, AZ)
Entretien
Five engineers, a manager and director asked medium level engineering and architecture questions including proof of structured coding and design skills. Each interviewer had varying questions. They rated at 0 (won’t work with candidate), 1 (adequate) or 2 (exceptional hire) for a team survey of votes to compare multiple candidates.
Questions d'entretien [1]
Question 1
Design a state machine to control a four way intersection of varying time traffic lights.
long but effective. 4 rounds of interviews ( quiz questions, computer architecture, past projects, leadership experience, basic algorithm questions, coding, etc.) each last 40 min. results came back after 10 days
