J'ai postulé via un établissement d'enseignement supérieur ou universitaire. J'ai passé un entretien chez Apple
Entretien
There are total 4 phone interviews for this position. The hiring process was smooth, organized and conducted in a fair manner. Interviewers are nice but technical questions are a little difficult.
Questions d'entretien [1]
Question 1
questions about resume, basic digital circuits question, how does FPGA do routing, switching power/static power, how to reduce them and some analysis based on different scenarios.
i was asked about the basic concepts about digital system. for example i was asked about a net with capciotos and inductors and about the output voltage based on the input voltage. in addition i was asked about FSM one question
J'ai postulé en personne. Le processus a pris 1 jour. J'ai passé un entretien chez Apple (Haïfa) en janv. 2021
Entretien
Tell me about Setup and Hold Timing constraints, introduce a project you made in Lab course, implement XOR using NANDs, they also explained about the chip design process in their company, and that it is a fabless company. Static Timing Analysis was the main issue, power consumption, CMOS design and verification
Questions d'entretien [1]
Question 1
implement XOR using NANDs
Setup and Hold Timing constraints