J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris plus d'une semaine. J'ai passé un entretien chez Synopsys (Noida) en oct. 2024
Entretien
First round resume shortlisting
second round online assessment (digital,analog,aptitude,cs fundamentals)
third round interview - digital,verilog,hdl,resume grilling,->for digital role
(pure analog-rectifiers,gidl,dibl,filters,cmos)->for vlsi design role
you better do both because you never know for which role u can sit because at last moment they do destroy this peace.
Questions d'entretien [1]
Question 1
All digital electronics must be on tip
TIP:you better know how to explain the things like a teacher because they asks (WHY this why thatg?) types question again and again
example :latches and flip flop difference
explain whole procedure of sr,jk flip flops
verilog and oops are also the hike topic and asked from me where i get fumbled a bit because they want a project that is related to verilog or core c++ in my resume which was missing but i managed somehow .
use pen and paper always for circuit explanation
