The Interview was 3-4 hrs. I was interviewed by 4 people individually one after the other. The Interview was on Digital Electronics, Verilog, System Verilog, STA and UVM. I was asked few questions on my VLSI project. The Interview was really satisfactory. The level of questions asked were good in Digital, Verilog and SVA. The UVM was not focussed upon much.

Internship - easy interview. On campus opportunity. Exploration call nothing much. Just tell what you know about domain and all. Not very hard okayish interview. Questions from projects and the coursework