4-5 rounds, basic questions related to verilog and digital electronics. Memory design and micro architecture questions. Non blocking vs blocking. Fsm based design questions. Verification basic knowledge check. Clock throughput datarates.

The interview was good, I answered every question, interviewers were smart, but had to decline the offer because the HRs made a bad deal and refused to connect me to the hiring managers, they used a classic strategy i told a number 6x, they said they can only pay 5x and made me agree to 5.3x, I accepted the deal so that I can resign early and accepted a much better deal and rejected maxlinear, glassdoor says they well, but I am very disappointed