J'ai postulé en ligne. Le processus a pris 2 semaines. J'ai passé un entretien chez Marvell Technology (Santa Clara, CA) en nov. 2014
Entretien
apply online and after several weeks, I got phone interview. It is about ASIC design/verification. My background is more focus on Verification of microprofessor, FPGA. Not very familiar with ASIC flow.so it is very important for background match.
J'ai postulé en ligne. J'ai passé un entretien chez Marvell Technology
Entretien
very good . interview is not much difficult
just brush up your knowledge. I think so its better to prepare in depth concepts. interview based on semi conductor. panel of the this company is very nyc.it was good experience to me. Thank you.
J'ai postulé via la recommandation d'un employé. Le processus a pris 4 semaines. J'ai passé un entretien chez Marvell Technology (New York, NY) en oct. 2018
Entretien
Got an interview via referral. After a month a recruiter contacted and scheduled a phone interview for primary screening. The 1st interview was basic check on my background. A second interview was scheduled in 2 weeks. I was given a number of topics to review. The questions were on timing analysis, fixing timing violations, CDC, and power optimization for ASIC. The interview went very well. The interviewer was very nice and said he is impressed with my solid preparation. Afterwards I was given a basic verilog coding problem, which I was supposed to email them. Then a day later they told me they will proceed with another candidate because they didn't like my answers regarding timing analysis- which contradicts what the interviewer told me. It seemed to me that they are just looking at candidates and wasting their time. At this point they are not really ready to hire for this position.
J'ai postulé en ligne. J'ai passé un entretien chez Marvell Technology en mai 2018
Entretien
I use linkdin to get interviw opportunity. HR arrange interview time.I just joined first run. No response after interview. Manager and team member interview me.
I have no ideas for other process.
Questions d'entretien [2]
Question 1
1.How to deal with multi-bit CDC
2.How to analysis timing for clock gating cell
3.Synthesis flow