J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 4 semaines. J'ai passé un entretien chez Arm (Chandler, AZ) en nov. 2017
Entretien
Chandler office. CPU Verification team.
1. Logic design - Gave a verilog code -> build circuit -> optimize it. FSM design
2. Verification - UVM architecture. How will you debug a processor? Verify Interrupts in pipeline
3. C++ : Constructors, memory allocation. Structs and OOP. Gave a detailed code snippet. Asked to debug and find errors (headers, function return type mismatch, command line args, memory alloc, constructor related errors)
4. Architecture - Draw pipeline, MSI, Cache size calculation, improve cache performance, Virtual memory, aliasing and how to solve, TLB and PT, What to do if some mem addresses are not cacheable in pipeline, Hazards, ROB structure and working
Know everything in detail
6
Candidature
J'ai passé un entretien chez Arm
Entretien
I had applied off campus and the resume was shortlisted and was asked to attend the further interview process at ARM Bengaluru. There was a technical written test(30 aptitude+40 technical ) followed by 2 technical interviews and 1 HR interview.
Questions d'entretien [1]
Question 1
Questions were asked from digital logic design and microcontrollers ,C programming ,OS concepts and a few puzzles.
Thanks for leaving a review of your interview experienced for our Bangalore office! While you were not extended an offer this time, we do hope you apply for other roles in the future as we always have a need for verification engineers.
-Rick C.
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