J'ai postulé via un établissement d'enseignement supérieur ou universitaire. Le processus a pris 5 semaines. J'ai passé un entretien chez AMD
Entretien
Met with 5 team members on site after phone chat with hiring manager. Variable of questions in verilog, C, as well as ASIC design flow and project experiences. not too difficult but covered wide areas.
Questions d'entretien [3]
Question 1
Truth table of a simple verilog module. blocking/unblocking assignment
metastability and cross clock domains: explain setup time and hold time, explain how synchronizer work, explain how 4/2 phase handshake, explain how asynchronouse fifo work
J'ai postulé en ligne. J'ai passé un entretien chez AMD (Markham, ON)
Entretien
Techincal questions about muxes, fsms, logic gates, latches and flip flops. Other non-technical questions about your experience and education, what have you done in courses, ect. Two interviews, first one was over the phone and the second was zoom with a panel talking about technical questions.
Talked with HR about a position and they thought I was a good candidate. Shortly after when scheduling our next meeting they said the position was full and they would keep in touch for other openings.
Questions d'entretien [1]
Question 1
Tell me about your current position and the key skills you use throughout your day.
this is a phone screen, introduce yourself, and flow with 3 technical questions. if pass then there will be 4 rounds of panel interviews. The rest of the line is to make it 30 words minimum.
Questions d'entretien [1]
Question 1
fifo deepth calculation using 1 32-bit adder to add two 64-bit data detect every value 1-bit position for a signal
